GxROM

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GxROM
Company Nintendo, others
Boards GNROM,MHROM
PRG ROM capacity 128KiB (512KiB oversize)
PRG ROM window 32KiB
PRG RAM capacity None
CHR capacity 32KiB (128KiB oversize)
CHR window 8KiB
Nametable mirroring Fixed H or V, controlled by solder pads
Bus conflicts Yes
IRQ No
Audio No
iNES mappers 066
NESCartDB
iNES 066
GNROM
MHROM

The designation GxROM refers to Nintendo cartridge boards labeled NES-GNROM and NES-MHROM (and their HVC counterparts), which use discrete logic to provide up to four 32 KB banks of PRG ROM and up to four 8 KB banks of CHR ROM. The iNES format assigns mapper 66 to these boards.

The Jaleco board assigned to iNES Mapper 140 is sometimes confused with GNROM, as they are very similar but with the bankswitch register in a different location.

Example games:

  • Doraemon
  • Dragon Power
  • Gumshoe
  • Thunder & Lightning
  • Super Mario Bros. + Duck Hunt (MHROM)

Board Types

The following GxROM boards are known to exist:

Board PRG ROM CHR
GNROM 128 KB 32 KB ROM
MHROM 64 KB 16 / 32 KB ROM

Banks

  • CPU $8000-$FFFF: 32 KB switchable PRG ROM bank
  • PPU $0000-$1FFF: 8 KB switchable CHR ROM bank

Registers

Bank select ($8000-$FFFF)

7  bit  0
---- ----
xxPP xxCC
  ||   ||
  ||   ++- Select 8 KB CHR ROM bank for PPU $0000-$1FFF
  ++------ Select 32 KB PRG ROM bank for CPU $8000-$FFFF

Bit 5 is not used on MHROM, which supports only 64 KB PRG.

Solder pad config

  • Horizontal mirroring : 'H' disconnected, 'V' connected.
  • Vertical mirroring : 'H' connected, 'V' disconnected.

Hardware

The GNROM board contains a 74HC161 binary counter used as a quad D latch (4-bit register) to select the current PRG and CHR banks. MHROM, on the other hand, was often a glop-top, as it was used for pack-in games, such as the Super Mario Bros./Duck Hunt multicart, and needed to be very inexpensive to produce in huge quantities.

Variants

Placing the bank register in $6000-$7FFF instead of $8000-$FFFF gives mapper 140. The Color Dreams board leaves the port at $8000-$FFFF, swaps the nibbles, expands CHR by two bits, and adds two bits for charge pump control.

Theoretically the bank select register could be implemented with a 74HC377 octal D latch, allowing up to 512 KB of PRG ROM and 128 KB of CHR ROM. There are a large number of other variants on GNROM, where the bits or the writeable address were moved around.

See also