Cycle reference chart

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Revision as of 19:34, 19 November 2018 by Banshaku (Talk | contribs) (Created page with "=== Reference of common CPU cycle count event === {| class="tabular" ! NSTC ! CPU cycles |- | Scanline | 113.667 |- | NMI | 2273 |- |Frame | 29780.667 |- | PPU cycles / CP...")

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Reference of common CPU cycle count event

NSTC CPU cycles
Scanline 113.667
NMI 2273
Frame 29780.667
PPU cycles / CPU cycles 3
PAL CPU cycles
Scanline 106.5625
NMI 7459.375
Frame 33247.5
PPU cycles / CPU cycles 3.2

OAM DMA = 513 cycles (+1 on odd CPU cycles)