Difference between revisions of "INES Mapper 031"

From Nesdev wiki
Jump to: navigation, search
m (Emulator support: MAME goes back at least as far as 0.162 when it incorproated MESS, MESS had it several months prior but history is hard to track down and this is good enough)
(Famicompo Pico is now multiple ROMs)
Line 9: Line 9:
* ''2A03 Puritans'' ([http://rainwarrior.ca/projects/nes/2a03puritans.html ROM])
* ''2A03 Puritans'' ([http://rainwarrior.ca/projects/nes/2a03puritans.html ROM])
* ''Famicompo Pico 2014'' ([http://rainwarrior.ca/projects/nes/pico.html ROM])
* ''Famicompo Pico'' ([http://rainwarrior.ca/projects/nes/pico.html ROMs])
* ''RNDM'' ([http://megaranmusic.com/album/rndm info])
* ''RNDM'' ([http://megaranmusic.com/album/rndm info])
* ''EZNSF'' ([//forums.nesdev.com/viewtopic.php?t=15204 forum post])
* ''EZNSF'' ([//forums.nesdev.com/viewtopic.php?t=15204 forum post])

Latest revision as of 18:17, 3 October 2019

iNES Mapper 031 represents a mapper created to facilitate cartridge compilations of NSF music. It implements a common subset of the features used by NSFs.

PRG-ROM is bankswitched in 8 x 4 kB banks from $8000-FFFF. These are controlled by registers at $5FF8-$5FFF like the NSF mapper. The high bank at $F000-FFFF is initialized to the last bank at power-on.

There is no CHR banking, so it is recommended to use 8 kB CHR-RAM with this mapper.

As with BNROM and UxROM, there is no mirroring, CHR bank, or IRQ control; this mapper has hardwired H or V mirroring.



  • PRG ROM size: Up to 1024 kB
  • PRG ROM bank size: 4 kB
  • PRG RAM: None
  • CHR capacity: 8 kB RAM/ROM
  • CHR bank size: Not bankswitched
  • Nametable mirroring: horizontal or vertical, hard wired.
  • Subject to bus conflicts: No


PRG bank select $5000-$5FFF

address              data
15      bit       0  7  bit  0
-------------------  ---------
0101 .... .... .AAA  PPPP PPPP
                |||  |||| ||||
                |||  ++++-++++- Select 4 kB PRG ROM bank at slot specified by write address.
                +++------------ Specify 4 kB bank slot at: $8000 + (AAA * $1000)

The canonical write position for these registers is $5FF8-$5FFF, as used in NSFs.

At power on, the register at $5FFF is set to $FF. Startup code should be placed in the last bank. There is no change to this register on reset.


Emulator support