INES Mapper 081

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Company NTDEC
Complexity Discrete logic
Boards N715021
PRG ROM capacity 64K
PRG ROM window 16K + 16K fixed
PRG RAM capacity None
CHR capacity 32K
CHR window 8K
Nametable mirroring Fixed H or V, controlled by solder pads
Bus conflicts No
Audio No
iNES mappers 081

This mapper is used on exactly one known game: Super Gun from NTDEC. Although the game's bankswitching code seems to suggest two separate data latches at $6000 and $8000-$FFFF (the latter with bus conflicts), the board actually latches the four lowest address bits, and ignores the write to $6000.


  • CPU $8000-$BFFF: 16 KB switchable PRG ROM bank
  • CPU $C000-$FFFF: 16 KB PRG ROM bank, fixed to the last bank
  • PPU $0000-$1FFF: 8 KB switchable CHR ROM bank


PRG/CHR Bank Select ($8000-$FFFF)

 CPU address bit#
1111 1100 0000 0000
5432 1098 7654 3210
---- ---- ---- ----
1... .... .... PPCC
               ||++------ Select 8 KB CHR ROM bank for PPU $0000-$1FFF
               ++-------- Select 16 KB PRG ROM bank for CPU $8000-$BFFF


Discussion with PCB images and analysis as well as Kazzo dumping script