CPU registers

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Revision as of 09:39, 20 February 2015 by Alphamule (talk | contribs) (Created article - didn't go into a lot of low-level detail, though.)
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The registers on the NES CPU are just like on the 6502. There is the accumulator, 2 indexes, a program counter, the stack pointer, and the status register. Unlike many CPU families, members do not have generic groups of registers like say, R0 through R7.


A is byte-wide and along with the ALU, supports using the status register for carrying, overflow detection, and so on.


X and Y are byte-wide and used for several addressing modes. They can be used as loop counters easily, using INC/DEC and branch instructions. Not being the accumulator, they have limited addressing modes themselves when loading and saving.

Program Counter

The 2-byte program counter PC supports 65536 direct (unbanked) memory locations, however not all values are sent to the cartridge. It can be accessed either by allowing CPU's internal fetch logic increment the address bus, an interrupt (NMI, Reset, IRQ/BRQ), and using the RTS/JMP/JSR/Branch instructions.

Stack Pointer

S is byte-wide and can be accessed using interrupts, pulls, pushes, and transfers.

Status Register

P has 6 bits used by the ALU but is byte-wide. PHP, PLP, arithmetic, testing, and branch instructions can access this register.