Difference between revisions of "NTDEC TC-112 pinout"

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NTDEC TC-112: 40-pin 0.6" PDIP. (Canonically [[iNES Mapper 193]])
 
NTDEC TC-112: 40-pin 0.6" PDIP. (Canonically [[iNES Mapper 193]])
 
+
                .---\/---.
C = Connected to cart
+
  (n)      M2 -> |1     40| -- VCC
R = Connected to ROM
+
  (s) CPU D7 -> |2     39| -> PRG A16 (r)
+
  (s) CPU D6 -> |3     38| -> PRG A15 (r)
            ---------  
+
  (s) CPU D5 -> |4     37| -> PRG A14 (r)
C      M2 -|1   40|- VCC
+
  (s) CPU D4 -> |5     36| -> PRG A13 (r)
  CR CPU D7 -|2   39|- PRG A16 R
+
  (s) CPU D3 -> |6     35| -> PRG1 /CE (r)
  CR CPU D6 -|3   38|- PRG A15 R
+
  (s) CPU D2 -> |7     34| -> PRG2 /CE (r)
  CR CPU D5 -|4   37|- PRG A14 R
+
  (s) CPU D1 -> |8     33| -> CHR A16 (r)
  CR CPU D4 -|5 N 36|- PRG A13 R
+
  (s) CPU A1 -> |9     32| -> CHR A15 (r)
  CR CPU D3 -|6 T 35|- PRG1 /CE R
+
  (s) CPU A0 -> |10   31| -> CHR A14 (r)
  CR CPU D2 -|7 D 34|- PRG2 /CE R
+
  (n) CPU R/W -> |11   30| -> CHR A13 (r)
  CR CPU D1 -|8 E 33|- CHR A16 R
+
  (n) CPU /CE -> |12   29| -> CHR A12 (r)
  CR CPU A1 -|9 C 32|- CHR A15 R
+
  (n) CPU A14 -> |13   28| -> CHR A11 (r)
  CR CPU A0 -|10   31|- CHR A14 R
+
  (n) CPU A13 -> |14   27| -> CHR1 /CE (r)
CPU R/W -|11 T 30|- CHR A13 R
+
  (n) PPU A13 -> |15   26| -> CHR2 /CE (r)
CPU /CE -|12 C 29|- CHR A12 R
+
  (n) PPU A12 -> |16   25| <- CPU D0   (s)
CPU A14 -|13 - 28|- CHR A11 R
+
  (n) PPU A11 -> |17   24| -- NC
CPU A13 -|14 1 27|- CHR1 /CE R
+
  (s) PPU A10 -> |18   23| -- NC
PPU A13 -|15 1 26|- CHR2 /CE R
+
  PPU /RD -> |19   22| <- CPU A2  (s) ???
PPU A12 -|16 2 25|- CPU D0 RC
+
          GND -- |20   21| -- NC
PPU A11 -|17   24|- NC
+
                `--------'
CR PPU A10 -|18   23|- NC
+
† On one board, connected to a seemingly-needlessly-complicated [[7400]] circuit. See the [http://forums.nesdev.com/viewtopic.php?t=7106 thread on the forum].
          † -|19   22|- CPU A2 RC   eh?
 
        GND -|20   21|- NC
 
            ---------
 
† On one board, connected to 74LS00 3Y; on another, connected to PPU /RD; see the [http://forums.nesdev.com/viewtopic.php?t=7106 thread on the forum]
 

Revision as of 05:36, 31 August 2012

NTDEC TC-112: 40-pin 0.6" PDIP. (Canonically iNES Mapper 193)

                .---\/---.
 (n)      M2 -> |1     40| -- VCC
 (s)  CPU D7 -> |2     39| -> PRG A16  (r)
 (s)  CPU D6 -> |3     38| -> PRG A15  (r)
 (s)  CPU D5 -> |4     37| -> PRG A14  (r)
 (s)  CPU D4 -> |5     36| -> PRG A13  (r)
 (s)  CPU D3 -> |6     35| -> PRG1 /CE (r)
 (s)  CPU D2 -> |7     34| -> PRG2 /CE (r)
 (s)  CPU D1 -> |8     33| -> CHR A16  (r)
 (s)  CPU A1 -> |9     32| -> CHR A15  (r)
 (s)  CPU A0 -> |10    31| -> CHR A14  (r)
 (n) CPU R/W -> |11    30| -> CHR A13  (r)
 (n) CPU /CE -> |12    29| -> CHR A12  (r)
 (n) CPU A14 -> |13    28| -> CHR A11  (r)
 (n) CPU A13 -> |14    27| -> CHR1 /CE (r)
 (n) PPU A13 -> |15    26| -> CHR2 /CE (r)
 (n) PPU A12 -> |16    25| <- CPU D0   (s)
 (n) PPU A11 -> |17    24| -- NC
 (s) PPU A10 -> |18    23| -- NC
  †  PPU /RD -> |19    22| <- CPU A2   (s) ???
         GND -- |20    21| -- NC
                `--------'

† On one board, connected to a seemingly-needlessly-complicated 7400 circuit. See the thread on the forum.